Non-volatile memory technology is driven by the increasing demand for memory in consumer electronics. Currently, FLASH memory is the mainstream technology used but it is reaching its physical limitations, and major scaling challenges are faced below the 16 nm technology node. Various alternative non-volatile memory technologies have been proposed to replace FLASH, including the Ferroelectric Random Access Memory (FeRAM), Magnetic Random Access Memory (MRAM), and the Phase Change Random Access Memory (PCRAM). PCRAM exhibits fast read and write speeds, low power consumption, non-destructive read, and long cycle endurance characteristics. The high scalability of PCRAM technology makes it attractive over the other contenders.
Current phase change random access memory (PCRAM) cell design features a combination of an access device (or a selection device) and a phase change memory component. The selection device includes a bipolar junction transistor (BJT), a metal oxide semiconductor field effect transistor (MOSFET), or a diode.
Various integration studies of PCRAM with complementary-metal-oxide-semiconductor (CMOS) technology have been performed, employing a MOS transistor (e.g. a metal oxide semiconductor field effect transistor (MOSFET)), bipolar junction transistor (BJT) or diode as the access device. In these studies, an intermediate metal material or metal layer is required as the bottom contact such as a tungsten (W) plug.
FIG. 1 shows a schematic diagram of a phase change memory cell 100 of prior art. The phase change memory cell 100 has a 1T-1R cell structure, including an access device 102 and a memory component 104 in contact with the access device 102 via a tungsten (W) plug 118. A 1T-1R cell structure refers to a structure having one access transistor (1T) (e.g. the access device 102) and one resistor (1R) in the form of a phase change material (e.g. in the memory component 104).
The access device 102 is a MOSFET having a source (S) 106a, a drain (D) 108a and a gate (G) 110. The access device 102 further includes a source terminal 106b coupled to the source 106a, and a drain terminal 108b coupled to the drain 108a. The access device 102 is formed on a silicon substrate 112.
The memory component 104 includes a phase change memory component 114 and a top electrode 116. As shown in FIG. 1, the access device 102 and the phase change memory component 114 are linked up via a tungsten plug 118, which acts as a bottom electrode for the memory component 104 and also a heater to the phase change material of the phase change memory component 114.
In a phase change memory device, the phase change material switches between a crystalline phase and an amorphous phase for binary storage during the SET and RESET operation, respectively. An electric pulse is applied for generation of Joule heat to alternate the material between these two phases. During the SET process, the amorphous phase change material is heated above its crystallization temperature for a sufficiently long time to convert it to the crystalline phase. On the other hand, during the RESET process, switching from the crystalline to amorphous phase is accomplished by raising the temperature above the melting point followed by rapid quenching. The higher temperature needed for the RESET operation requires an electrical pulse of larger amplitude. However, the high current required in the RESET process to amorphize the phase change material limits the size of the access device providing the current. Therefore, the current required during the RESET process should be minimized to realize cost-effective and high-density PCRAM, since it imposes a requirement on the size of the access device providing the current.
For cost-effective and high density memory devices, various techniques have been employed to reduce the RESET current, such as by improving the structural design of the phase change memory component and device, engineering of the phase change material and manipulation of the properties of the heater or contact material. A metal contact with a material with suitable thermal properties and good contact is preferred for improved device performances.